There is 128KB of dedicated sprite definition RAM (capacity for 512 16x16 sprite blocks). Each block image is stored as 256 bytes in a linear chunky "1 byte = 1 pixel" fashion, left to right, top to bottom of the definition. Colour index zero is considered transparent by the sprite video hardware.

Sprites are always 16 pixels wide but can be up to 240 pixels tall. The height of an individual sprite (in 16 line blocks) is set by its control register. The additional definition data comes from the blocks in sprite RAM following the sprite's specified definition. Sprite images can be individually mirrored horizontally by setting a bit in their control registers - see detail below.

There are 127 sprite registers. A double buffering mode allows half the sprite registers to be updated whilst the sprite hardware builds the display from the other half (the buffers are typically switched by the user program each frame). This removes possible on-screen glitches and/or the need to dump data to the sprite registers off-screen. Bits in vreg_sprctrl switch this mode on/off and select the register bank that the sprite hardware uses. When double buffered, the number of available sprite registers is reduced to 63.

Access to sprite RAM is via 4KB pages mapped into Z80 address space locations $1000-$1fff. Bit 7 of the sys_mem_select port register selects sprite memory paging on/off. The page number is selected with the video register vreg_vidpage (write the page number 0-31, with bit 7 set). Sprite RAM is write-only and cannot be read by the CPU (system RAM contents always appear at $1000-$1fff when reading).

Sprite definition memory accepts writes at full speed when the sprites are disabled. When sprites are enabled, writes from the CPU are forced to wait until the sprite hardware releases the RAM buses. The length of the wait during contention depends how busy the sprite hardware is on a given scanline. The sprite control registers are not subject to contention.

There is time to generate a maximum of 55 sprites PER LINE but enough sprite registers to allow for 127* sprites. Therefore, this can be thought of as hardware multiplexing: Because it is uncommon for 55 sprites to appear on the same line, sprite images from all the registers will normally be displayed if spread throughout the entire frame.

Sprite to video control is achieved via the sprite priority registers - details at the link.

Sprite Control Registers (4 bytes per sprites):

Memory addresses:

$400-$5fd (127 registers - when double buffer mode is disabled)
or

$400-$4fd (Register bank 0) (63 registers - double buffer mode)
$500-$5fd (Register bank 1) (63 registers - double buffer mode)

Each sprite register is 4 sequential bytes:

$00 : X coord (low 8 bits)

$01 : Bit Assignments:

7:4 = Height of sprite (in blocks of 16 lines) (If the 4 height bits are zero, the sprite is 240 pixels tall.)
3 = X Mirror this sprite image
2 = Definition MSB
1 = Y coordinate MSB
0 = X coordinate MSB

$02 : Y coord (low 8 bits)

$03 - Sprite definition number (low 8 bits)

X and Y coordinates and the definition values are 9 bit in size, the MSBs are stored in the second byte of the register. The coordinate positions are fixed and are not relative to the display window position, IE: the X/Y coordinates are the same absolute positions as those used by the window location / size set up. (X sprite positions are actually one pixel less than x_window_start position).


If the "force_colours_high" mode is enabled (bit 4 in vreg_sprctrl = 1) the 4 height bits are as follows (Note: When the remaining 3 height bits are all zero, the sprite is 240 pixels tall.)

Bit:
7 - Interleave mode priority against background: 0 = below, 1 = in front
6 - Height (bit 2)
5 - Height (bit 1)
4 - Height (bit 0)


If the "matte_mode" is enabled (bit 5 in vreg_sprctrl = 1) the 4 height bits are as follows (Note: when height bits 1 and 0 are zero, the sprite is 64 pixels tall)

Bit:
7 - Height (bit 3)
6 - Force non-zero colours to 127 or 255
5 - Height (bit 1)
4 - Height (bit 0)


If both "matte_mode" and "force_colours_high" modes are selected, the bits are as follows: (Note: when height bits 1 and 0 are zero, the sprite is 64 pixels tall)

Bit:
7 - Interleave mode priority against background: 0 = below, 1 = in front
6 - Force non-zero colours to either 127 or 255
5 - Height (bit 1)
4 - Height (bit 0)